In the field of high frequency electronic circuit design, gallium arsenide (GaAs) microwave monolithic integrated circuits (MMIC's) were demonstrated in the 1970's. Since then, many resources have been put into extending the maximum operating frequency (fmax) of GaAs products (e.g., MESFET, PHEMT, HEMT, and HBT technologies) into the hundreds of gigahertz (GHz). However, due to its superior material properties, Gallium nitride (GaN) may provide a superior alternative GaAs. GaN may offer, for example, higher efficiency and a higher operating voltage with lower current, thereby allowing the design of circuitry with approximately ten times the power density of a GaAs PHEMT.
The choice of substrates on which to grow GaN-based MMIC's is an important factor in device performance. It may be desirable, for example, to provide a substrate with low electrical conductivity to limit RF losses through the substrate to ground (i.e., a non-insulating substrate is equivalent to a lossy transmission line to ground at high frequencies). Accordingly, materials such as sapphire or SiC may be used as substrates for GaN devices. Sapphire is a particularly attractive candidate for substrate material due to its cost effectiveness and low-loss characteristics.
However, MMIC's desirably incorporate via holes through the substrate to provide adequate ground contacts to a backside metallization formed thereon. Additionally, such vias may desirably provide thermal contact to assist in heat dissipation from the MMIC to the package. For a 100 μm thick sapphire substrate, for example, 8 to 10 via holes having diameters between 30 and 60 μm may be desired per 1 mm2 chip. This adds up to approximately 60,000 vias for a standard 4 inch wafer, and approximately 150,000 vias for a standard 6 inch wafer. Due to sapphire's materials characteristics, however, it may be cost prohibitive, inefficient, and generally undesirable to mechanically machine 60,000 to 150,000 via holes approximately 100 μm or deeper into sapphire substrates using standard machining techniques.
It may also be cost prohibitive and undesirable to machine this many via holes into sapphire using a dry etch or ion beam milling. Dry etch or ion beam milling techniques require a mask to be placed over the sapphire with holes in the mask at the desirable via hole locations. The mask, however, may be undesirably thick and generally impractical for forming a large number of via holes at a desired spacing on a tough sapphire substrate.